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GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
13 years 23 days ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
HICSS
2011
IEEE
157views Biometrics» more  HICSS 2011»
13 years 23 days ago
Reusing Relational Queries for Intuitive Decision Optimization
— Decision optimization is used in many applications such as those for finding the best course of action in emergencies. However, optimization solutions require considerable mat...
Alexander Brodsky, Nathan E. Egge, Xiaoyang Sean W...
HPCA
2011
IEEE
13 years 23 days ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
HPCA
2011
IEEE
13 years 23 days ago
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tu...
ICASSP
2011
IEEE
13 years 23 days ago
Modeling nodal prices in deregulated electricity markets in the usa: current practices and future needs
The purpose of this paper is to model the stochastic behavior of the nodal prices of electricity in deregulated markets in the USA, and in particular, to explain how this behavior...
Timothy D. Mount
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