1688 search results - page 176 / 338 » Implementing Optimizations at Decode Time |
FPGA
2009
ACM
14 years 3 months ago
2009
ACM
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
PAM
2012
Springer
12 years 3 months ago
2012
Springer
Network administrators are faced with the increasingly challenging task of monitoring their network’s health in real time, drawing upon diverse and voluminous measurement data fe...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for...
NIPS
2004
13 years 9 months ago
2004
As animals interact with their environments, they must constantly update estimates about their states. Bayesian models combine prior probabilities, a dynamical model and sensory e...
CORR
2010
Springer
13 years 8 months ago
2010
Springer
For a family/sequence of Space-Time Block Codes (STBCs) C1, C2, . . . , with increasing number of transmit antennas Ni, with rates Ri complex symbols per channel use, i = 1, 2, . ....