1688 search results - page 191 / 338 » Implementing Optimizations at Decode Time |
CLUSTER
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents Two-Phase Compressed I/O (TPC I/O,) an optimization of the Two-Phase collective I/O technique from ROMIO, the most popular MPI-IO implementation. In order to r...
AHS
2006
IEEE
14 years 2 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
GECCO
2004
Springer
14 years 1 months ago
2004
Springer
This paper introduces subchromosome representations to the linkage learning genetic algorithm (LLGA). The subchromosome representation is utilized for effectively lowering the num...
DSD
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper1 addresses the hardware implementation of a dynamic scheduler for non-manifest data dependent periodic loops. Static scheduling techniques which are known to give near ...
EUROPAR
2001
Springer
14 years 23 days ago
2001
Springer
Abstract. In this paper, we address two key trends in the synthesis of implementations for embedded multiprocessors — (1) the increasing importance of managing interprocessor com...