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169
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FPL
2006
Springer
242views Hardware» more  FPL 2006»
15 years 6 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
112
Voted
HPDC
1995
IEEE
15 years 6 months ago
A High Speed Implementation of Adaptive Shaping for Dynamic Bandwidth Allocation
Most algorithms proposed for controlling traffic prior to entering ATM networks are based on static mechanisms. Such static control mechanisms do not account for the dynamics of ...
Cameron Braun, V. Sirkay, H. Uriona, Srini W. Seet...
112
Voted
PVM
2007
Springer
15 years 8 months ago
Analysis of Implementation Options for MPI-2 One-Sided
Abstract. The Message Passing Interface provides an interface for onesided communication as part of the MPI-2 standard. The semantics specified by MPI-2 allow for a number of di...
Brian Barrett, Galen M. Shipman, Andrew Lumsdaine
ECCV
2008
Springer
16 years 4 months ago
Implementing Decision Trees and Forests on a GPU
We describe a method for implementing the evaluation and training of decision trees and forests entirely on a GPU, and show how this method can be used in the context of object rec...
Toby Sharp
117
Voted
IJCNN
2007
IEEE
15 years 9 months ago
Implementation of multi-layer leaky integrator networks on a cellular processor array
- We present an application of a massively parallel processor array VLSI circuit to the implementation of neural networks in complex architectural arrangements. The work was motiva...
David R. W. Barr, Piotr Dudek, Jonathan M. Chamber...