Sciweavers

5562 search results - page 978 / 1113
» Implementing Parallel Cell-DEVS
Sort
View
LPNMR
1993
Springer
15 years 6 months ago
Negation as Partial Failure
We present a logic programming language which uses a four-valued bilattice as the underlying framework for semantics of programs. The two orderings of the bilattice reflect the c...
Bamshad Mobasher, Jacek Leszczylowski, Don Pigozzi
177
Voted
SIGGRAPH
1993
ACM
15 years 6 months ago
Imaging vector fields using line integral convolution
Imaging vector fields has applications in science, art, image processing and special effects. An effective new approach is to use linear and curvilinear filtering techniques to ...
Brian Cabral, Leith Casey Leedom
120
Voted
ARC
2007
Springer
102views Hardware» more  ARC 2007»
15 years 6 months ago
Reconfigurable Hardware Acceleration of Canonical Graph Labelling
Many important algorithms in computational biology and related subjects rely on the ability to extract and to identify sub-graphs of larger graphs; an example is to find common fun...
David B. Thomas, Wayne Luk, Michael Stumpf
CASES
2007
ACM
15 years 6 months ago
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs
Advances in semiconductor technologies have placed MPSoCs center stage as a standard architecture for embedded applications of ever increasing complexity. Efficient utilization of...
Chengmo Yang, Alex Orailoglu
109
Voted
CAV
2010
Springer
179views Hardware» more  CAV 2010»
15 years 6 months ago
Generating Litmus Tests for Contrasting Memory Consistency Models
Well-defined memory consistency models are necessary for writing correct parallel software. Developing and understanding formal specifications of hardware memory models is a chal...
Sela Mador-Haim, Rajeev Alur, Milo M. K. Martin