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ECRTS
2000
IEEE
14 years 1 days ago
Towards validated real-time software
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
Valérie Bertin, Michel Poize, Jacques Pulou...
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
13 years 11 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...
MEMOCODE
2003
IEEE
14 years 27 days ago
MoDe: A Method for System-Level Architecture Evaluation
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
Jan Romberg, Oscar Slotosch, Gabor Hahn
ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
13 years 5 months ago
Distributed DVFS using rationally-related frequencies and discrete voltage levels
Abstract--As a replacement for the fast-fading GloballySynchronous model, we have defined a flexible design style called GRLS, for Globally-Ratiochronous, Locally-Synchronous, whic...
Jean-Michel Chabloz, Ahmed Hemani
IPPS
2003
IEEE
14 years 27 days ago
A Hierarchical Model for Distributed Collaborative Computation in Wireless Sensor Networks
Clustering is an important characteristic of most sensor applications. In this paper we define COSMOS, the Cluster-based, heterOgeneouS MOdel for Sensor networks. The model assum...
Mitali Singh, Viktor K. Prasanna