857 search results - page 135 / 172 » Implementing a STARI chip |
DSN
2006
IEEE
14 years 2 months ago
2006
IEEE
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Computer architects have typically ad...
ICMCS
2006
IEEE
14 years 2 months ago
2006
IEEE
With increased concern for physical security, video surveillance is becoming an important business area. Similar camera-based system can also be used in such diverse applications ...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Due to shared cache contentions and interconnect delays, data prefetching is more critical in alleviating penalties from increasing memory latencies and demands on Chip-Multiproce...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
We present Program Demultiplexing (PD), an execution paradigm that creates concurrency in sequential programs by "demultiplexing" methods (functions or subroutines). Cal...