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» Implementing a STARI chip
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ATS
2001
IEEE
172views Hardware» more  ATS 2001»
14 years 3 days ago
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih...
FC
2000
Springer
106views Cryptology» more  FC 2000»
14 years 1 days ago
Capability-Based Financial Instruments
Every novel cooperative arrangement of mutually suspicious parties interacting electronically -- every smart contract -- effectively requires a new cryptographic protocol. However,...
Mark S. Miller, Chip Morningstar, Bill Frantz
CARDIS
2008
Springer
113views Hardware» more  CARDIS 2008»
13 years 10 months ago
The Trusted Execution Module: Commodity General-Purpose Trusted Computing
This paper introduces the Trusted Execution Module (TEM); a high-level specification for a commodity chip that can execute usersupplied procedures in a trusted environment. The TEM...
Victor Costan, Luis F. G. Sarmenta, Marten van Dij...
DAC
2005
ACM
13 years 10 months ago
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
Hongliang Chang, Vladimir Zolotov, Sambasivan Nara...
FMCAD
2008
Springer
13 years 10 months ago
BackSpace: Formal Analysis for Post-Silicon Debug
Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall ...
Flavio M. de Paula, Marcel Gort, Alan J. Hu, Steve...