857 search results - page 166 / 172 » Implementing a STARI chip |
SI3D
2003
ACM
14 years 17 days ago
2003
ACM
This paper describes shear-image order ray casting, a new method for volume rendering. This method renders sampled data in three dimensions with image quality equivalent to the be...
ISCA
2002
IEEE
14 years 7 days ago
2002
IEEE
Tarantula is an aggressive floating point machine targeted at technical, scientific and bioinformatics workloads, originally planned as a follow-on candidate to the EV8 processo...
FPL
2009
Springer
13 years 12 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
SIGGRAPH
2000
ACM
13 years 11 months ago
2000
ACM
We present the WarpEngine, an architecture designed for realtime image-based rendering of natural scenes from arbitrary viewpoints. The modeling primitives are real-world images w...
PDP
2010
IEEE
13 years 11 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...