857 search results - page 168 / 172 » Implementing a STARI chip |
CASES
2004
ACM
13 years 11 months ago
2004
ACM
With the ever-increasing pervasiveness of the Internet and its stringent performance requirements, network system designers have begun utilizing specialized chips to increase the ...
CF
2006
ACM
13 years 11 months ago
2006
ACM
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
ARITH
2001
IEEE
13 years 11 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
CASES
2001
ACM
13 years 11 months ago
2001
ACM
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...