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ISM
2006
IEEE
130views Multimedia» more  ISM 2006»
14 years 2 months ago
Accelerating Color Space Conversion Using Extended Subwords and the Matrix Register File
Color space conversion is an important kernel in multimedia codecs such as JPEG and MPEG. When implemented using SIMD instructions, however, the performance improvement is often l...
Asadollah Shahbahrami, Ben H. H. Juurlink, Stamati...
FPL
2008
Springer
86views Hardware» more  FPL 2008»
13 years 10 months ago
Instruction buffer mode for multi-context Dynamically Reconfigurable Processors
In multi-context Dynamically Reconfigurable Processor Array (DRPA), the required number of contexts is often increased by those with low resource usage. In order to execute such c...
Toru Sano, Masaru Kato, Satoshi Tsutsumi, Yohei Ha...
JGTOOLS
2008
168views more  JGTOOLS 2008»
13 years 9 months ago
Efficient, High-Quality Bayer Demosaic Filtering on GPUs
This paper describes a series of optimizations for implementing the high-quality Malvar-He-Cutler Bayer demosaicing filter on a GPU in OpenGL. Applying this filter is the first st...
Morgan McGuire
ASAP
2009
IEEE
143views Hardware» more  ASAP 2009»
14 years 6 months ago
Scalar Processing Overhead on SIMD-Only Architectures
—The Cell processor consists of a general-purpose core and eight cores with a complete SIMD instruction set. Although originally designed for multimedia and gaming, it is current...
Arnaldo Azevedo Filho, Ben H. H. Juurlink
FCCM
2007
IEEE
101views VLSI» more  FCCM 2007»
14 years 3 months ago
Mapping Real Time Operating System on Reconfigurable Instruction Cell Based Architectures
This paper presents the porting of an RTOS Micro C/OS-II on a novel reconfigurable instruction cell based architecture which fills the gap between DSP, FPGA and ASIC with high per...
Han Wei, Mark Muir, Ioannis Nousias, Tughrul Arsla...