182 search results - page 5 / 37 » Implementing the PGI Accelerator model |
IJCNN
2006
IEEE
14 years 1 months ago
2006
IEEE
— This paper describes an area-efficient mixed-signal implementation of synapse-based long term plasticity realized in a VLSI1 model of a spiking neural network. The artificial...
FDL
2008
IEEE
14 years 2 months ago
2008
IEEE
—This paper introduces a novel numerical carbon nanotube transistor (CNT) modelling approach which brings in a flexible and efficient cubic spline non-linear approximation of t...
FPL
2004
Springer
14 years 1 months ago
2004
Springer
ASIPs and reconfigurable processors are architectural choices to extend the capabilities of a given processor. ASIPs suffer from fixed hardware after design, while ASIPs and reconf...
ATVA
2006
Springer
13 years 11 months ago
2006
Springer
We present the implementation of the trace theory in a new model checking tool framework, POEM, that has a strong emphasis on Partial Order Methods. A tree structure is used to sto...
SI3D
2006
ACM
14 years 1 months ago
2006
ACM
In this paper, we propose a new technique for hardware accelerated multi-resolution geometry synthesis. The level of detail for a given viewpoint is created on-the-fly, allowing f...