244 search results - page 35 / 49 » Implementing the scale vector-thread processor |
CAV
2004
Springer
14 years 28 days ago
2004
Springer
The logic of equality with uninterpreted functions (EUF) and its extensions have been widely applied to processor verification, by means of a large variety of progressively more s...
EUROPAR
2004
Springer
14 years 28 days ago
2004
Springer
Abstract. Ever-increasing demand for computing capability is driving the construction of ever-larger computer clusters, soon to be reaching tens of thousands of processors. Many fu...
FPGA
2004
ACM
14 years 28 days ago
2004
ACM
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
IPPS
2003
IEEE
14 years 25 days ago
2003
IEEE
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
DATE
2010
IEEE
14 years 19 days ago
2010
IEEE
Increasing dynamic variability with technology scaling has made it essential to incorporate large design-time timing margins to ensure yield and reliable operation. Online techniq...