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ITC
2003
IEEE
123views Hardware» more  ITC 2003»
14 years 3 months ago
A Comprehensive Approach to Assessing and Analyzing 1149.1 Test Logic
In this paper we introduce a tool which is capable of verifying an 1149.1 test logic implementation and its compliance to the IEEE 1149.1 Standard [1][2] while providing a precise...
Kevin Melocco, Hina Arora, Paul Setlak, Gary Kunse...
CGA
2008
13 years 10 months ago
Virtual Inspector: A Flexible Visualizer for Dense 3D Scanned Models
The rapid evolution of automatic shape acquisition technologies will make huge amount of sampled 3D data available in the near future. Cultural Heritage (CH) domain is one of the ...
Marco Callieri, Federico Ponchio, Paolo Cignoni, R...
CIKM
2008
Springer
13 years 11 months ago
Transaction reordering with application to synchronized scans
Traditional workload management methods mainly focus on the current system status while information about the interaction between queued and running transactions is largely ignore...
Gang Luo, Jeffrey F. Naughton, Curt J. Ellmann, Mi...
IWMM
2011
Springer
206views Hardware» more  IWMM 2011»
13 years 21 days ago
A comprehensive evaluation of object scanning techniques
At the heart of all garbage collectors lies the process of identifying and processing reference fields within an object. Despite its key role, and evidence of many different impl...
Robin Garner, Stephen M. Blackburn, Daniel Frampto...
ITC
2003
IEEE
110views Hardware» more  ITC 2003»
14 years 3 months ago
An extension to JTAG for at-speed debug on a system
When developing new designs, debugging the prototype is important to resolve application malfunction. During this board design debug, often a few pins of an IC are measured to che...
Leon van de Logt, Frank van der Heyden, Tom Waayer...