525 search results - page 12 / 105 » Improved Circular Layouts |
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
CGF
2006
13 years 7 months ago
2006
We present a novel algorithm to compute cache-efficient layouts of bounding volume hierarchies (BVHs) of polygonal models. Our approach does not make any assumptions about the cac...
GD
2009
Springer
14 years 7 hour ago
2009
Springer
Abstract. We present a new application for graph drawing in the context of graphical model-based system design, where manual placing of graphical items is still state-of-the-practi...
ICDAR
1999
IEEE
13 years 11 months ago
1999
IEEE
This paper presents part of a new DIA performance analysis framework aimed at Layout Analysis algorithm developers. A new region-representation scheme (an interval-based descripti...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...