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SBACPAD
2004
IEEE
144views Hardware» more  SBACPAD 2004»
13 years 8 months ago
Improving Server Performance on Transaction Processing Workloads by Enhanced Data Placement
Modern servers access large volumes of data while running commercial workloads. The data is typically spread among several storage devices (e.g. disks). Carefully placing the data...
Juan Rubio, Charles Lefurgy, Lizy Kurian John
ICPP
1999
IEEE
13 years 11 months ago
A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations
There has been much work recently on improving the locality performance of loop nests in scientific programs through the use of loop as well as data layout optimizations. However,...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
IPPS
2000
IEEE
13 years 11 months ago
Dynamic Data Layouts for Cache-Conscious Factorization of DFT
Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing ...
Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Vi...
CDES
2006
107views Hardware» more  CDES 2006»
13 years 8 months ago
An Algorithm for Yield Improvement via Local Positioning and Resizing
The ability to improve the yield of integrated circuits through layout modification has been recognized and several techniques for yield enhanced routing and compaction have been ...
Vazgen Karapetyan
ISPA
2004
Springer
14 years 23 days ago
HPL Performance Prevision to Intending System Improvement
HPL is a parallel Linpack benchmark package widely adopted in massive cluster system performance test. On HPL data layout among processors, a law to determine block size NB theoret...
Wenli Zhang, Mingyu Chen, Jianping Fan