455 search results - page 15 / 91 » Improved Force-Directed Layouts |
PCI
2005
Springer
14 years 3 months ago
2005
Springer
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Advanced MOSFETs such as Strained Silicon (SS) devices have emerged as critical enablers to keep Moore's law on track for sub100nm technologies. Use of Strained Silicon devic...
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
The synthesis of clock network in the presence of process variation is becoming a vital design issue towards the performance of digital circuits. In this paper, we propose a clock ...
BMCV
2000
Springer
14 years 2 months ago
2000
Springer
The perception and recognition of spatial layout of objects within a three-dimensional setting was studied using a virtual reality (VR) simulation. The subjects' task was to d...
USENIX
2007
14 years 2 days ago
2007
Current disk prefetch policies in major operating systems track access patterns at the level of the file abstraction. While this is useful for exploiting application-level access...