Sciweavers

2201 search results - page 181 / 441
» Improvement of ASIC Design Processes
Sort
View
XPU
2009
Springer
15 years 8 months ago
XP Workshop on Agile Product Line Engineering
Software Product Line Engineering (SPLE) promises to lower the costs of developing individual applications as they heavily reuse existing artifacts. Besides decreasing costs, softw...
Yaser Ghanam, Kendra Cooper, Pekka Abrahamsson, Fr...
119
Voted
WSC
2007
15 years 6 months ago
Modeling and simulation of hard disk dive final assembly using a HDD template
A HDD template is designed and developed for modeling and simulation for final assembly of hard disk drive (HDD) manufacturing using Arena. The designed HDD template is a high fle...
Ahad Ali, Robert de Souza
149
Voted
WSC
2007
15 years 6 months ago
Allocation of simulation runs for simulation optimization
Simulation optimization (SO) is the process of finding the optimum design of a system whose performance measure(s) are estimated via simulation. We propose some ideas to improve o...
Alireza Kabirian, Sigurdur Ólafsson
168
Voted
DAC
2006
ACM
15 years 5 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
128
Voted
ICASSP
2009
IEEE
15 years 10 months ago
Rate-distortion optimized bitstream extractor for motion scalability in scalable video coding
Motion scalability is designed to improve the coding efficiency of a scalable video coding framework, especially in the medium to low range of decoding bit rates or spatial resol...
Meng-Ping Kao, Truong Nguyen