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» Improvement of ASIC Design Processes
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IPPS
2010
IEEE
13 years 6 months ago
Large neighborhood local search optimization on graphics processing units
Local search (LS) algorithms are among the most powerful techniques for solving computationally hard problems in combinatorial optimization. These algorithms could be viewed as &q...
Thé Van Luong, Nouredine Melab, El-Ghazali ...
TCAD
2010
110views more  TCAD 2010»
13 years 3 months ago
Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage Power
Abstract--In sub-100 nm CMOS processes, delay and leakage power reduction continue to be among the most critical design concerns. We propose to exploit the recent availability of f...
Kwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Ha...
CF
2007
ACM
14 years 25 days ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
ML
2000
ACM
244views Machine Learning» more  ML 2000»
13 years 8 months ago
Learnable Evolution Model: Evolutionary Processes Guided by Machine Learning
A new class of evolutionary computation processes is presented, called Learnable Evolution Model or LEM. In contrast to Darwinian-type evolution that relies on mutation, recombinat...
Ryszard S. Michalski
BMCBI
2008
79views more  BMCBI 2008»
13 years 9 months ago
A high-throughput pipeline for designing microarray-based pathogen diagnostic assays
Background: We present a methodology for high-throughput design of oligonucleotide fingerprints for microarray-based pathogen diagnostic assays. The oligonucleotide fingerprints, ...
Ravi Vijaya Satya, Nela Zavaljevski, Kamal Kumar, ...