Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage Power

Abstract--In sub-100 nm CMOS processes, delay and leakage power reduction continue to be among the most critical design concerns. We propose to exploit the recent availability of fine-grain exposure dose control in the step-and-scan tool to achieve both design-time (placement) and manufacturing-time (yield-aware dose mapping) optimizations of timing yield and leakage power. Our placement and dose map co-optimization can improve both timing yield and leakage power of a given design. We formulate the placement-aware dose map optimization as quadratic and quadratic constraint programs which are solved using efficient quadratic program solvers. In this paper, we mainly focus on the placement-aware dose map optimization problem; in the Appendix, we describe a complementary but less impactful dose map-aware placement optimization based on an efficient cell swapping heuristic. Experimental results show noticeable improvements in minimum cycle time without leakage power increase, or in leakage...

• Type: Journal
• Year: 2010
• Where: TCAD
• Authors: Kwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Hailong Yao
• Keywords: Dose Map, Dose Map Optimization, Leakage Power, Software Engineering, TCAD 2010