231 search results - page 5 / 47 » Improvements to combinational equivalence checking |
TCAD
2002
13 years 6 months ago
2002
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
CAV
2009
Springer
13 years 11 months ago
2009
Springer
Designers often apply manual or semi-automatic loop and data transformations on array and loop intensive programs to improve performance. The transformations should preserve the fu...
CAV
2009
Springer
14 years 7 months ago
2009
Springer
We present HOMER, an observational-equivalence model checker for the 3rd-order fragment of Idealized Algol (IA) augmented with iteration. It works by first translating terms of the...
ICSE
2005
IEEE-ACM
14 years 7 months ago
2005
IEEE-ACM
We present an automatic error-detection approach that combines static checking and concrete test-case generation. Our approach consists of taking the abstract error conditions inf...
ICCAD
1998
IEEE
13 years 11 months ago
1998
IEEE
Combinational verification is an important piece of most equivalence checking tools. In the recent past, many combinational verification algorithms have appeared in the literature...