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DSD
2008
IEEE
139views Hardware» more  DSD 2008»
13 years 9 months ago
Revisiting the Cache Effect on Multicore Multithreaded Network Processors
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. ...
CMG
2006
13 years 9 months ago
Analytic performance models for single class and multiple class multithreaded software servers
Modern computer systems are based on a wide variety of software servers, such as web servers, application servers, database servers, and mail servers. The typical software archite...
Daniel A. Menascé, Mohamed N. Bennani
ACISICIS
2005
IEEE
14 years 1 months ago
An Effective Cache Overlapping Storage Structure for SMT Processors
Simultaneous Multithreaded (SMT) processors improve the instruction throughput by allowing fetching and running instructions from several threads simultaneously at a single cycle....
Liqiang He, Zhiyong Liu
ICS
2007
Tsinghua U.
14 years 1 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev
CODES
2011
IEEE
12 years 7 months ago
Adaptive resource management for simultaneous multitasking in mixed-grained reconfigurable multi-core processors
We propose a novel scheme for run-time management of mixedgrained reconfigurable fabric for the purpose of simultaneous multi-tasking in multi-core reconfigurable processors. Trad...
Waheed Ahmed, Muhammad Shafique, Lars Bauer, J&oum...