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133
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ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
15 years 7 months ago
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi,...
133
Voted
IPPS
2005
IEEE
15 years 8 months ago
Energy-Aware Task Scheduling: Towards Enabling Mobile Computing over MANETs
Enabling high performance, persistent mobile computing has recently become a very active research area. The widespread popularity of mobile computing devices, such as laptops, han...
Waleed Alsalih, Selim G. Akl, Hossam S. Hassanein
141
Voted
VLDB
2005
ACM
180views Database» more  VLDB 2005»
15 years 8 months ago
Cache-conscious Frequent Pattern Mining on a Modern Processor
In this paper, we examine the performance of frequent pattern mining algorithms on a modern processor. A detailed performance study reveals that even the best frequent pattern min...
Amol Ghoting, Gregory Buehrer, Srinivasan Parthasa...
CF
2006
ACM
15 years 6 months ago
The potential of the cell processor for scientific computing
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...
Samuel Williams, John Shalf, Leonid Oliker, Shoaib...
135
Voted
ICC
2009
IEEE
157views Communications» more  ICC 2009»
15 years 9 months ago
A Graph Approach to Dynamic Fractional Frequency Reuse (FFR) in Multi-Cell OFDMA Networks
A graph-based framework for dynamic fractional frequency reuse (FFR) in multi-cell OFDMA networks is proposed in this work. FFR is a promising resource allocation technique that c...
Ronald Chang, Zhifeng Tao, Jinyun Zhang, C.-C. Jay...