Sciweavers

2032 search results - page 378 / 407
» Improving Java performance using hardware translation
Sort
View
124
Voted
PVLDB
2008
137views more  PVLDB 2008»
15 years 1 months ago
Flashing up the storage layer
In the near future, commodity hardware is expected to incorporate both flash and magnetic disks. In this paper we study how the storage layer of a database system can benefit from...
Ioannis Koltsidas, Stratis Viglas
133
Voted
IPPS
2010
IEEE
15 years 10 days ago
Large neighborhood local search optimization on graphics processing units
Local search (LS) algorithms are among the most powerful techniques for solving computationally hard problems in combinatorial optimization. These algorithms could be viewed as &q...
Thé Van Luong, Nouredine Melab, El-Ghazali ...
IPPS
2010
IEEE
15 years 9 days ago
Dynamic load balancing on single- and multi-GPU systems
The computational power provided by many-core graphics processing units (GPUs) has been exploited in many applications. The programming techniques currently employed on these GPUs...
Long Chen, Oreste Villa, Sriram Krishnamoorthy, Gu...
CODES
2011
IEEE
14 years 2 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
ICCAD
2007
IEEE
128views Hardware» more  ICCAD 2007»
15 years 11 months ago
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar