Sciweavers

68 search results - page 6 / 14
» Improving Memory Subsystem Performance Using ViVA: Virtual V...
Sort
View
HPDC
2002
IEEE
14 years 16 days ago
Using Kernel Couplings to Predict Parallel Application Performance
Performance models provide significant insight into the performance relationships between an application and the system used for execution. The major obstacle to developing perfor...
Valerie E. Taylor, Xingfu Wu, Jonathan Geisler, Ri...
DAC
2003
ACM
14 years 25 days ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis
CF
2009
ACM
14 years 2 months ago
Strategies for dynamic memory allocation in hybrid architectures
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...
Peter Bertels, Wim Heirman, Dirk Stroobandt
ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
14 years 2 months ago
Disaggregated memory for expansion and sharing in blade servers
Analysis of technology and application trends reveals a growing imbalance in the peak compute-to-memory-capacity ratio for future servers. At the same time, the fraction contribut...
Kevin T. Lim, Jichuan Chang, Trevor N. Mudge, Part...
CASES
2008
ACM
13 years 9 months ago
Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware
Automatic vectorization of programs for partitioned-ALU SIMD (Single Instruction Multiple Data) processors has been difficult because of not only data dependency issues but also n...
Hoseok Chang, Wonyong Sung