328 search results - page 13 / 66 » Improving Performance of Small On-Chip Instruction Caches |
VLDB
2004
ACM
14 years 1 months ago
2004
ACM
Online transaction processing (OLTP) is a multibillion dollar industry with high-end database servers employing state-of-the-art processors to maximize performance. Unfortunately,...
GECCO
2009
Springer
13 years 5 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
ICDCS
1996
IEEE
13 years 11 months ago
1996
IEEE
This paper evaluates the bene t of adding a shared cache to the network interface as a means of improving the performance of networked workstations con gured as a distributed shar...
HPCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Caches are very inefficiently utilized because not all the excess data fetched into the cache, to exploit spatial locality, is utilized. We define cache utilization as the percent...
GLVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Share of leakage in cache memories is increasing with technology scaling. Studies show that most stored bits in instruction caches are zero, and hence, asymmetric SRAM cells which...