328 search results - page 22 / 66 » Improving Performance of Small On-Chip Instruction Caches |
HIPEAC
2010
Springer
13 years 5 months ago
2010
Springer
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a ...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
With the increasing performance gap between the processor and the memory, the importance of caches is increasing for high performance processors. However, with reducing feature si...
ICS
1999
Tsinghua U.
13 years 12 months ago
1999
Tsinghua U.
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
HIPEAC
2010
Springer
13 years 9 months ago
2010
Springer
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
ASPLOS
1998
ACM
13 years 12 months ago
1998
ACM
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...