328 search results - page 58 / 66 » Improving Performance of Small On-Chip Instruction Caches |
ISCA
1996
IEEE
13 years 11 months ago
1996
IEEE
Historically, processor accesses to memory-mapped device registers have been marked uncachable to insure their visibility to the device. The ubiquity of snooping cache coherence, ...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
A path confidence estimate indicates the likelihood that the processor is currently fetching correct path instructions. Accurate path confidence prediction is critical for applica...
ASPLOS
2000
ACM
13 years 12 months ago
2000
ACM
Simultaneous Multithreading machines fetch and execute instructions from multiple instruction streams to increase system utilization and speedup the execution of jobs. When there ...
IEEEPACT
2003
IEEE
14 years 23 days ago
2003
IEEE
Graphics and media processing is quickly emerging to become one of the key computing workloads. Programmable graphics processors give designers extra flexibility by running a sma...
CLUSTER
2006
IEEE
14 years 1 months ago
2006
IEEE
Disk and network latency must be taken into account when applying parallel computing to large multidimensional datasets because they can hinder performance by reducing the rate at...