328 search results - page 59 / 66 » Improving Performance of Small On-Chip Instruction Caches |
ASPLOS
1998
ACM
13 years 11 months ago
1998
ACM
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
ECOOP
2000
Springer
13 years 11 months ago
2000
Springer
The support for precise exceptions in Java, combined with frequent checks for runtime exceptions, leads to severe limitations on the compiler’s ability to perform program optimiz...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Automatic vectorization of programs for partitioned-ALU SIMD (Single Instruction Multiple Data) processors has been difficult because of not only data dependency issues but also n...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Modern processors improve instruction level parallelism by speculation. The outcome of data and control decisions is predicted, and the operations are speculatively executed and o...
ICC
2000
IEEE
13 years 12 months ago
2000
IEEE
: A new push-and-pull hybrid data broadcast scheme is proposed for providing wireless information services to three types of clients, general, pull and priority clients. Only pull ...