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VTC
2010
IEEE
159views Communications» more  VTC 2010»
13 years 6 months ago
Architectural Analysis of a Smart DMA Controller for Protocol Stack Acceleration in LTE Terminals
—In this paper we present an architectural analysis of a smart DMA (sDMA) controller for protocol stack acceleration in mobile devices supporting 3GPP’s Long Term Evolution (LT...
Sebastian Hessel, David Szczesny, Felix Bruns, Att...
CAV
2011
Springer
202views Hardware» more  CAV 2011»
12 years 11 months ago
Simplifying Loop Invariant Generation Using Splitter Predicates
Abstract. We present a novel static analysis technique that substantially improves the quality of invariants inferred by standard loop invariant generation techniques. Our techniqu...
Rahul Sharma 0001, Isil Dillig, Thomas Dillig, Ale...
DSD
2011
IEEE
309views Hardware» more  DSD 2011»
12 years 7 months ago
FBMC and GFDM Interference Cancellation Schemes for Flexible Digital Radio PHY Design
—With the opening up of white spaces, efficient use of the fragmented spectrum - TV white space in particular - has become an extremely important focus of research. Apart from ef...
Rohit Datta, Gerhard Fettweis, Zsolt Kollar, P&eac...
ETS
2011
IEEE
212views Hardware» more  ETS 2011»
12 years 7 months ago
Structural Test for Graceful Degradation of NoC Switches
Abstract—Networks-on-Chip (NoCs) are implicitly fault tolerant due to their inherent redundancy. They can overcome defective cores, links and switches. As a side effect, yield is...
Atefe Dalirsani, Stefan Holst, Melanie Elm, Hans-J...
ISCA
2005
IEEE
115views Hardware» more  ISCA 2005»
14 years 1 months ago
RENO - A Rename-Based Instruction Optimizer
RENO is a modified MIPS R10000 register renamer that uses map-table “short-circuiting” to implement dynamic versions of several well-known static optimizations: move eliminat...
Vlad Petric, Tingting Sha, Amir Roth