1045 search results - page 178 / 209 » Improving SHA-2 Hardware Implementations |
DFT
2004
IEEE
13 years 11 months ago
2004
IEEE
In this paper, a simple codec algorithm based on Reed-Solomon (RS) codes is proposed for erasure correcting in RAID (Redundant Array of Independent Disks) level 6 systems. Unlike ...
DAC
2006
ACM
13 years 11 months ago
2006
ACM
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
FPGA
2006
ACM
13 years 11 months ago
2006
ACM
A key advantage of soft processors (processors built on an FPGA programmable fabric) over hard processors is that they can be customized to suit an application program's spec...
ISHPC
2000
Springer
13 years 11 months ago
2000
Springer
The shared-memory programming model is a very effective way to achieve parallelism on shared memory parallel computers. As great progress was made in hardware and software technolo...
WSC
2008
13 years 10 months ago
2008
In this paper, we propose an integrated architecture for modeling, simulation, and execution of PLC (Programmable Logic Controller) based manufacturing system. The main objective ...