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IEEEPACT
2002
IEEE
14 years 1 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
JDCTA
2010
102views more  JDCTA 2010»
13 years 3 months ago
A Novel Pixel Line Based Algorithm for Line Generation
Straight line is the most basic element of graphics, and it is of great significance to study fast algorithm of line generating. On the basis of Bresenham algorithm, this paper co...
Yu-rong Li, Fu-guo Dong
EUROPAR
2004
Springer
14 years 2 months ago
Improving Data Cache Performance via Address Correlation: An Upper Bound Study
Address correlation is a technique that links the addresses that reference the same data values. Using a detailed source-code level analysis, a recent study [1] revealed that diffe...
Peng-fei Chuang, Resit Sendag, David J. Lilja
ISCA
2012
IEEE
274views Hardware» more  ISCA 2012»
11 years 11 months ago
The dynamic granularity memory system
Chip multiprocessors enable continued performance scaling with increasingly many cores per chip. As the throughput of computation outpaces available memory bandwidth, however, the...
Doe Hyun Yoon, Min Kyu Jeong, Michael Sullivan, Ma...
HPCA
2007
IEEE
14 years 9 months ago
Improving Branch Prediction and Predicated Execution in Out-of-Order Processors
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-predict branches, transforming control dependencies into data dependencies. Althou...
Eduardo Quiñones, Joan-Manuel Parcerisa, An...