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FCCM
2009
IEEE
164views VLSI» more  FCCM 2009»
14 years 4 months ago
A Parameterized Stereo Vision Core for FPGAs
—We present a parameterized stereo vision core suitable for a wide range of FPGA targets and stereo vision applications. By enabling easy tuning of algorithm parameters, our syst...
Stephen Longfield Jr., Mark L. Chang
PODC
2004
ACM
14 years 3 months ago
Bringing practical lock-free synchronization to 64-bit applications
Many lock-free data structures in the literature exploit techniques that are possible only because state-of-the-art 64-bit processors are still running 32-bit operating systems an...
Simon Doherty, Maurice Herlihy, Victor Luchangco, ...
ISCA
2007
IEEE
174views Hardware» more  ISCA 2007»
14 years 4 months ago
An integrated hardware-software approach to flexible transactional memory
There has been considerable recent interest in the support of transactional memory (TM) in both hardware and software. We present an intermediate approach, in which hardware is us...
Arrvindh Shriraman, Michael F. Spear, Hemayet Hoss...
SIPS
2006
IEEE
14 years 4 months ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
ISCA
2007
IEEE
115views Hardware» more  ISCA 2007»
14 years 4 months ago
VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization
Indirect branches have become increasingly common in modular programs written in modern object-oriented languages and virtualmachine based runtime systems. Unfortunately, the pred...
Hyesoon Kim, José A. Joao, Onur Mutlu, Chan...