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» Improving architecture testability with patterns
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ISCA
2012
IEEE
270views Hardware» more  ISCA 2012»
11 years 9 months ago
Revisiting hardware-assisted page walks for virtualized systems
Recent improvements in architectural supports for virtualization have extended traditional hardware page walkers to traverse nested page tables. However, current twodimensional (2...
Jeongseob Ahn, Seongwook Jin, Jaehyuk Huh
MCS
2001
Springer
13 years 11 months ago
Automatic Model Selection in a Hybrid Perceptron/Radial Network
We provide several enhancements to our previously introduced algorithm for a sequential construction of a hybrid network of radial and perceptron hidden units [6]. At each stage, ...
Shimon Cohen, Nathan Intrator
ADBIS
2004
Springer
105views Database» more  ADBIS 2004»
14 years 24 days ago
Event Database Processing
: The purpose of the current work is to explore and improve the analysis of event data stored in event repositories, enabling the application of specialized event algebra operators...
Joris Mihaeli, Opher Etzion
DAC
2006
ACM
14 years 8 months ago
Timing-based delay test for screening small delay defects
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
IJCNN
2008
IEEE
14 years 1 months ago
Robust modular ARTMAP for multi-class shape recognition
— This paper presents a Fuzzy ARTMAP (FAM) based modular architecture for multi-class pattern recognition known as Modular Adaptive Resonance Theory Map (MARTMAP). The prediction...
Chue Poh Tan, Chen Change Loy, Weng-Kin Lai, Chee ...