259 search results - page 31 / 52 » Improving architecture testability with patterns |
DATE
2003
IEEE
14 years 20 days ago
2003
IEEE
Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan...
IEEEINTERACT
2003
IEEE
14 years 20 days ago
2003
IEEE
Recent studies on program execution behavior reveal that a large amount of execution time is spent in small frequently executed regions of code. Whereas adaptive cache management ...
VIP
2001
13 years 8 months ago
2001
It is often necessary to reduce storage and bandwidth requirements when recording or broadcasting a sequence of actions on a computer screen. These applications most commonly fall...
JCM
2008
13 years 7 months ago
2008
The use of antenna arrays at emission and reception seems to represent a prominent solution for future wireless systems, it improves data rates and enhances the quality of service....
PIMRC
2010
IEEE
13 years 5 months ago
2010
IEEE
In this paper, we propose an iterative SIC receiver architecture with pilot- and data-based channel estimation for efficient decoding of non-orthogonal superimposed signals. The no...