68 search results - page 11 / 14 » Improving logic density through synthesis-inspired architect... |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
Continuous transistor scaling due to improvements in CMOS devices and manufacturing technologies is increasing processor power densities and temperatures; thus, creating challenges...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
Custom design, in which the designer controls the physical structure of the chip, can greatly improve the speed, power, and delay of an ASIC chip without affecting design time. Th...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
Cloud services accessed through mobile devices suffer from high network access latencies and are constrained by energy budgets dictated by the devices’ batteries. Radio and batt...
VLSID
2007
IEEE
14 years 8 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...