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179
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PLDI
1994
ACM
15 years 10 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar
204
Voted
ISCA
2011
IEEE
333views Hardware» more  ISCA 2011»
14 years 9 months ago
The impact of memory subsystem resource sharing on datacenter applications
In this paper we study the impact of sharing memory resources on five Google datacenter applications: a web search engine, bigtable, content analyzer, image stitching, and protoc...
Lingjia Tang, Jason Mars, Neil Vachharajani, Rober...
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
16 years 24 days ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
BIOCOMP
2006
15 years 7 months ago
Performance of Sequence Alignment Bioinformatics Applications on General Purpose Processors: A Case Study
- Aligning specific sequences against other known sequences in a database is a central aspect of bioinformatics. New experimental data being added continuously to these databases n...
Pradeep Nair, Eugene John
IPPS
2007
IEEE
16 years 13 days ago
Improving Scalability of OpenMP Applications on Multi-core Systems Using Large Page Support
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...
Ranjit Noronha, Dhabaleswar K. Panda