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IEEEPACT
2008
IEEE
14 years 2 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 2 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
HPCA
2011
IEEE
13 years 8 days ago
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tu...
JVM
2004
165views Education» more  JVM 2004»
13 years 10 months ago
Using Hardware Performance Monitors to Understand the Behavior of Java Applications
Modern Java programs, such as middleware and application servers, include many complex software components. Improving the performance of these Java applications requires a better ...
Peter F. Sweeney, Matthias Hauswirth, Brendon Caho...
IWMM
2009
Springer
127views Hardware» more  IWMM 2009»
14 years 3 months ago
Investigating the effects of using different nursery sizing policies on performance
In this paper, we investigate the effects of using three different nursery sizing policies on overall and garbage collection performances. As part of our investigation, we modify ...
Xiaohua Guan, Witawas Srisa-an, ChengHuan Jia