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DAC
2010
ACM
13 years 8 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
EUROPAR
2009
Springer
13 years 11 months ago
StarPU: A Unified Platform for Task Scheduling on Heterogeneous Multicore Architectures
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
Cédric Augonnet, Samuel Thibault, Raymond N...
IPPS
2006
IEEE
14 years 1 months ago
Dynamic resource allocation of computer clusters with probabilistic workloads
Real-time resource scheduling is an important factor for improving the performance of cluster computing. In many distributed and parallel processing systems, particularly real-tim...
Marwan S. Sleiman, Lester Lipsky, Robert Sheahan
SSR
2001
83views more  SSR 2001»
13 years 9 months ago
Increasing the confidence in off-the-shelf components: a software connector-based approach
The promise of component-based software development is that larger, more complex systems can be built reasonably quickly and reliably from pre-fabricated ("off-the-shelf"...
Marija Mikic-Rakic, Nenad Medvidovic
ICPADS
2006
IEEE
14 years 1 months ago
Ensuring Fairness Among Participating Clusters During Multi-site Parallel Job Scheduling
Multi-cluster schedulers can dramatically improve average job turn-around time performance by making use of fragmented node resources available throughout the grid. By carefully m...
William M. Jones, Walter B. Ligon III