69 search results - page 5 / 14 » Improving the Performance of Read-Only Transactions Through ... |
CGO
2004
IEEE
13 years 10 months ago
2004
IEEE
Efficient inter-thread value communication is essential for improving performance in Thread-Level Speculation (TLS). Although several mechanisms for improving value communication ...
RTSS
1996
IEEE
13 years 11 months ago
1996
IEEE
In this paper, issues involved in the design of a real-time database which maintains data temporal consistency are discussed. The concept of data-deadline is introduced and time co...
IPPS
2003
IEEE
14 years 10 days ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
SBACPAD
2003
IEEE
14 years 9 days ago
2003
IEEE
Trace reuse improves the performance of processors by skipping the execution of sequences of redundant instructions. However, many reusable traces do not have all of their inputs ...
ISCA
2009
IEEE
14 years 1 months ago
2009
IEEE
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...