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ETT
2000
91views Education» more  ETT 2000»
15 years 4 months ago
Performance Analysis and Estimation of Call Admission Control Parameters in Wireless Integrated Voice and Data Networks
We propose an admission control policy for wireless multimedia networks that is based on the well known threshold-based guard channel method. The new scheme deals with two differen...
Mahmoud T. El-Hadidi, Khaled M. F. Elsayed, Mohame...
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
14 years 8 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
EUROPAR
2008
Springer
15 years 6 months ago
Performance Implications of Cache Affinity on Multicore Processors
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...
Vahid Kazempour, Alexandra Fedorova, Pouya Alagheb...
FCCM
2008
IEEE
165views VLSI» more  FCCM 2008»
15 years 11 months ago
Performance Analysis with High-Level Languages for High-Performance Reconfigurable Computing
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
John Curreri, Seth Koehler, Brian Holland, Alan D....
IPPS
2008
IEEE
15 years 11 months ago
Parallel performance wizard: A performance analysis tool for partitioned global-address-space programming
Given the complexity of parallel programs, developers often must rely on performance analysis tools to help them improve the performance of their code. While many tools support th...
Hung-Hsun Su, Max Billingsley, Alan D. George