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DATE
2008
IEEE
138views Hardware» more  DATE 2008»
14 years 2 months ago
Functional Self-Testing for Bus-Based Symmetric Multiprocessors
Functional, instruction-based self-testing of microprocessors has recently emerged as an effective alternative or supplement to other testing approaches, and is progressively adop...
Andreas Apostolakis, Dimitris Gizopoulos, Mihalis ...
ICPP
1991
IEEE
13 years 11 months ago
Cache Coherence on a Slotted Ring
-- The Express Ring is a new architecture under investigation at the University of Southern California. Its main goal is to demonstrate that a slotted unidirectional ring with very...
Luiz André Barroso, Michel Dubois
IPPS
1998
IEEE
13 years 12 months ago
Deriving Efficient Cache Coherence Protocols through Refinement
Abstract. We address the problem of developing efficient cache coherence protocols implementing distributed shared memory (DSM) using message passing. A serious drawback of traditi...
Ratan Nalumasu, Ganesh Gopalakrishnan
TPDS
2002
80views more  TPDS 2002»
13 years 7 months ago
An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors
Yunheung Paek, Angeles G. Navarro, Emilio L. Zapat...
TPDS
2002
90views more  TPDS 2002»
13 years 7 months ago
Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol
Daniel J. Sorin, Manoj Plakal, Anne Condon, Mark D...