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HPCA
2011
IEEE
12 years 11 months ago
MOPED: Orchestrating interprocess message data on CMPs
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
Junli Gu, Steven S. Lumetta, Rakesh Kumar, Yihe Su...
ASPLOS
1991
ACM
13 years 11 months ago
LimitLESS Directories: A Scalable Cache Coherence Scheme
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
David Chaiken, John Kubiatowicz, Anant Agarwal
ISCA
1991
IEEE
162views Hardware» more  ISCA 1991»
13 years 11 months ago
Comparison of Hardware and Software Cache Coherence Schemes
We use mean value analysis models to compare representative hardware and software cache coherence schemes for a large-scale shared-memory system. Our goal is to identify the workl...
Sarita V. Adve, Vikram S. Adve, Mark D. Hill, Mary...
PODC
1994
ACM
13 years 11 months ago
Using Belief to Reason about Cache Coherence
The notion of belief has been useful in reasoning about authentication protocols. In this paper, we show how the notion of belief can be applied to reasoning about cache coherence...
Lily B. Mummert, Jeannette M. Wing, Mahadev Satyan...
ICPP
1990
IEEE
13 years 11 months ago
Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes
As multiprocessors are scaled beyond single bus systems, there is renewed interest in directory-based cache coherence schemes. These schemes rely on a directory to keep track of a...
Anoop Gupta, Wolf-Dietrich Weber, Todd C. Mowry