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DATE
2010
IEEE
98views Hardware» more  DATE 2010»
14 years 22 days ago
SigNet: Network-on-chip filtering for coarse vector directories
—Scalable cache coherence is imperative as systems move into the many-core era with cores counts numbering in the hundreds. Directory protocols are often favored as more scalable...
Natalie Enright Jerger
CDES
2008
166views Hardware» more  CDES 2008»
13 years 9 months ago
Scalable Directory Organization for Tiled CMP Architectures
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...
Alberto Ros, Manuel E. Acacio, José M. Garc...
SSS
2010
Springer
128views Control Systems» more  SSS 2010»
13 years 6 months ago
On Transactional Scheduling in Distributed Transactional Memory Systems
We present a distributed transactional memory (TM) scheduler called Bi-interval that optimizes the execution order of transactional operations to minimize conflicts. Bi-interval c...
Junwhan Kim, Binoy Ravindran
ICDCS
2006
IEEE
14 years 1 months ago
DNScup: Strong Cache Consistency Protocol for DNS
Effective caching in Domain Name System (DNS) is critical to its performance and scalability. Existing DNS only supports weak cache consistency by using the Time-To-Live (TTL) mec...
Xin Chen, Haining Wang, Shansi Ren
IPPS
2010
IEEE
13 years 4 months ago
Clustering JVMs with software transactional memory support
Affordable transparent clustering solutions to scale non-HPC applications on commodity clusters (such as Terracotta) are emerging for Java Virtual Machines (JVMs). Working in this ...
Christos Kotselidis, Mikel Luján, Mohammad ...