309 search results - page 42 / 62 » In-Network Cache Coherence |
TVCG
2010
13 years 2 months ago
2010
Abstract--One important bottleneck when visualizing large data sets is the data transfer between processor and memory. Cacheaware (CA) and cache-oblivious (CO) algorithms take into...
JSS
2008
13 years 7 months ago
2008
In this paper, we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it inclu...
SIGARCH
2008
13 years 7 months ago
2008
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
SIGOPSE
1996
ACM
13 years 11 months ago
1996
ACM
Applications of the future will need to support large numbers of clients and will require scalable storage systems that allow state to be shared reliably. Recent research in distr...