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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
13 years 11 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
ECIS
2003
13 years 8 months ago
E-learning: designing new business education
Business Schools are experiencing increased competitive pressures, and one way to differentiate and compete distinctively is through the adoption of innovative uses of information...
Cristina Cáliz, Sandra Sieber
JCIT
2010
161views more  JCIT 2010»
13 years 2 months ago
Improvement on Intrusion Detection Technology Based on Protocol Analysis and Pattern Matching
With the development of high-speed network technique and increasing volume of network traffic, traditional pattern matching method can't adapt to the new challenges to intrus...
Liang Hu, Kuo Tang, Yu Ku, Kuo Zhao
DATE
2007
IEEE
100views Hardware» more  DATE 2007»
13 years 7 months ago
A new pipelined implementation for minimum norm sorting used in square root algorithm for MIMO-VBLAST systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...
DSN
2007
IEEE
14 years 1 months ago
Dependability Assessment of Grid Middleware
Dependability is a key factor in any software system due to the potential costs in both time and money a failure may cause. Given the complexity of Grid applications that rely on ...
Nik Looker, Jie Xu