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VLDB
2005
ACM
121views Database» more  VLDB 2005»
14 years 25 days ago
Improving Database Performance on Simultaneous Multithreading Processors
Simultaneous multithreading (SMT) allows multiple threads to supply instructions to the instruction pipeline of a superscalar processor. Because threads share processor resources,...
Jingren Zhou, John Cieslewicz, Kenneth A. Ross, Mi...
WSC
2008
13 years 9 months ago
The APIOBPCS Deziel and Eilon parameter configuration in supply chain under progressive information sharing strategies
The aim of this paper is to investigate how different smoothing parameter levels of the Automatic Pipeline Inventory and Order Based Production Control System smoothing replenishm...
Salvatore Cannella, Elena Ciancimino
CSE
2011
IEEE
12 years 7 months ago
Performance Enhancement of Network Devices with Multi-Core Processors
— In network based applications, packet capture is the main area that attracts many researchers in developing traffic monitoring systems. Along with the packet capture, many othe...
Nhat-Phuong Tran, Sugwon Hong, Myungho Lee, Seung-...
DATE
2008
IEEE
148views Hardware» more  DATE 2008»
14 years 1 months ago
Automated Dynamic Throughput-constrained Structural-level Pipelining in Streaming Applications
Stream processing applications such as image signal processing demand high throughput. However, customers increasingly demand runtime flexibility in their designs, which cannot b...
Mark Muir, Tughrul Arslan, Iain Lindsay
ISCA
1997
IEEE
98views Hardware» more  ISCA 1997»
13 years 11 months ago
Target Prediction for Indirect Jumps
As the issue rate and pipeline depth of high performance superscalar processors increase, the amount of speculative work issued also increases. Because speculative work must be th...
Po-Yung Chang, Eric Hao, Yale N. Patt