Sciweavers

945 search results - page 149 / 189
» Incremental Branching Programs
Sort
View
WMPI
2004
ACM
14 years 1 months ago
Understanding the effects of wrong-path memory references on processor performance
High-performance out-of-order processors spend a significant portion of their execution time on the incorrect program path even though they employ aggressive branch prediction al...
Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale ...
CG
2004
Springer
14 years 1 months ago
Searching over Metapositions in Kriegspiel
Kriegspiel is a Chess variant similar to wargames, in which players have to deal with uncertainty. Kriegspiel increases the difficulty typical of Chess by hiding from each player h...
Andrea Bolognesi, Paolo Ciancarini
ESTIMEDIA
2004
Springer
14 years 1 months ago
Identifying "representative" workloads in designing MpSoC platforms for media processing
— Workload design is a well recognized problem in the domain of microprocessor design. Different program characteristics that influence the selection of a representative workloa...
Alexander Maxiaguine, Samarjit Chakraborty, Wei Ts...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
14 years 29 days ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
APCSAC
2000
IEEE
14 years 4 days ago
Micro-Threading: A New Approach to Future RISC
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...
Chris R. Jesshope, Bing Luo