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LCPC
1998
Springer
13 years 12 months ago
Copy Elimination for Parallelizing Compilers
Techniques for aggressive optimization and parallelization of applications can have the side-effect of introducing copy instructions, register-to-register move instructions, into t...
David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
IWPC
1997
IEEE
13 years 12 months ago
Identifying objects in legacy systems
Many organisations are migrating towards object-oriented technology. However, owing to the business value of legacy software, new object-oriented development has to be weighed aga...
Aniello Cimitile, Andrea De Lucia, Giuseppe A. Di ...
CASES
2007
ACM
13 years 11 months ago
An integrated ARM and multi-core DSP simulator
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
Sharad Singhai, MingYung Ko, Sanjay Jinturkar, May...
CASES
2007
ACM
13 years 11 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...
IWMM
2010
Springer
137views Hardware» more  IWMM 2010»
13 years 11 months ago
The locality of concurrent write barriers
Concurrent and incremental collectors require barriers to ensure correct synchronisation between mutator and collector. The overheads imposed by particular barriers on particular ...
Laurence Hellyer, Richard Jones, Antony L. Hosking