452 search results - page 10 / 91 » Incremental formal design verification |
VLSID
1999
IEEE
13 years 11 months ago
1999
IEEE
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
ISARCS
2010
13 years 9 months ago
2010
Methods of formal description and verification represent a viable way for achieving fundamentally bug-free software. However, in reality only a small subset of the existing operati...
ISICT
2003
13 years 8 months ago
2003
: Cryptographic protocols are used to achieve secure communication over insecure networks. Weaknesses in such protocols are hard to identify, as they can be the result of subtle de...
ISORC
2000
IEEE
13 years 11 months ago
2000
IEEE
The Unified Modeling Language UML is well-suited for the design of real-time systems. In particular, the design of dynamic system behaviors is supported by interaction diagrams an...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...